W2L14C334MAT1A [KYOCERA AVX]

Ceramic Capacitor, Multilayer, Ceramic, 4V, 20% +Tol, 20% -Tol, X7R, 15% TC, 0.33uF, Surface Mount, 0508, CHIP, ROHS COMPLIANT;
W2L14C334MAT1A
型号: W2L14C334MAT1A
厂家: KYOCERA AVX    KYOCERA AVX
描述:

Ceramic Capacitor, Multilayer, Ceramic, 4V, 20% +Tol, 20% -Tol, X7R, 15% TC, 0.33uF, Surface Mount, 0508, CHIP, ROHS COMPLIANT

电容器
文件: 总2页 (文件大小:118K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
IDC Low Inductance Capacitors (RoHS)  
0306/0612/0508 IDC (InterDigitated Capacitors)  
GENERAL DESCRIPTION  
Inter-Digitated Capacitors (IDCs) are used for both semiconductor  
package and board level decoupling. The equivalent series  
inductance (ESL) of a single capacitor or an array of capacitors in  
0612  
parallel determines the response time of a Power Delivery Network  
(PDN). The lower the ESL of a PDN, the faster the response time.  
A designer can use many standard MLCCs in parallel to reduce  
ESL or a low ESL Inter-Digitated Capacitor (IDC) device. These IDC  
devices are available in versions with a maximum height of 0.95mm  
+
+
or 0.55mm.  
0508  
IDCs are typically used on packages of semiconductor products  
with power levels of 15 watts or greater. Inter-Digitated Capacitors  
are used on CPU, GPU, ASIC, and ASSP devices produced on  
0.13μ, 90nm, 65nm, and 45nm processes. IDC devices are used  
on both ceramic and organic package substrates. These low ESL  
surface mount capacitors can be placed on the bottom side or the  
top side of a package substrate. The low profile 0.55mm maximum  
height IDCs can easily be used on the bottom side of BGA  
packages or on the die side of packages under a heat spreader.  
+
+
0306  
TYPICAL IMPEDANCE  
10  
IDCs are used for board level decoupling of systems with speeds of  
300MHz or greater. Low ESL IDCs free up valuable board space by  
reducing the number of capacitors required versus standard  
MLCCs. There are additional benefits to reducing the number of  
capacitors beyond saving board space including higher reliability  
from a reduction in the number of components and lower  
placement costs based on the need for fewer capacitors.  
MLCC_1206  
LICC_0612  
1
0.1  
IDC_0612  
0.01  
The Inter-Digitated Capacitor (IDC) technology was developed by  
AVX. This is the second family of Low Inductance MLCC products  
created by AVX. IDCs are a cost effective alternative to AVXs first  
generation low ESL family for high-reliability applications known as  
LICA (Low Inductance Chip Array).  
0.001  
1
10  
100  
1000  
Frequency (MHz)  
AVX IDC products are available with a lead-free finish of plated  
Nickel/Tin.  
HOW TO ORDER  
225  
M
W
3
L
1
6
D
A
T
3
A
Capacitance Capacitance  
Style  
IDC  
Low  
Inductance  
Number Voltage Dielectric  
Failure Termination Packaging  
Thickness  
Max. Thickness  
mm (in.)  
A=Standard  
S=0.55 (0.0±±)  
Code (In pF)  
Tolerance  
Case  
of  
Rate  
4 = 4V  
C = X7R  
D = X5R  
Z = X7S  
T = Plated Ni  
and Sn  
Available  
1=7" Reel  
3=13" Reel  
Size  
Terminals  
1 = 8 Terminals  
± Sig. Digits + M = ±±0ꢀ  
Number of  
Zeros  
A = N/A  
6 = 6.3V  
Z = 10V  
Y = 16V  
3 = ±5V  
± = 0508  
3 = 061±  
4 = 0306  
NOTE: Contact factory for availability of Termination and Tolerance Options for Specific Part Numbers.  
PERFORMANCE CHARACTERISTICS  
Capacitance Tolerance  
Operation  
±±0ꢀ Preferred  
Dielectric Strength  
CTE (ppm/C)  
No problems observed after ±.5 x RVDC  
for 5 seconds at 50mA max current  
X7R = -55°C to +1±5°C  
X5R = -55°C to +85°C  
X7S = -55°C to +1±5°C  
Temperature Range  
1±.0  
Thermal Conductivity 4-5W/M K  
Temperature Coefficient ±15ꢀ (0VDC), ±±±ꢀ (X7S)  
Voltage Ratings  
4, 6.3, 10, 16, ±5 VDC  
Terminations  
Available  
Plated Nickel and Solder  
Dissipation Factor  
≤ 6.3V = 6.5ꢀ max;  
10V = 5.0ꢀ max;  
≥ 16V = 3.5ꢀ max  
Insulation Resistance  
(@+25°C, RVDC)  
100,000MΩ min, or 1,000MΩ per  
μF min.,whichever is less  
REV 01  
78  
IDC Low Inductance Capacitors (RoHS)  
0306/0612/0508 IDC (InterDigitated Capacitors)  
SIZE  
W4 = 0306  
W2 = Thin 0508  
W2 = 0508  
W3= Thin 0612  
W3 = 0612  
W3 = THICK 0612  
Max.  
mm  
(in.)  
0.55  
0.55.  
0.95  
0.55  
0.95  
1.±±  
Thickness  
(0.0±±)  
(0.0±±)  
(0.037)  
(0.0±±)  
(0.037)  
(0.048)  
WVDC  
4
6.3  
4
6.3  
10  
16  
±5  
4
6.3  
10  
16  
±5  
4
6.3  
10  
16  
4
6.3  
10  
16  
±5  
4
6.3  
10  
16  
Cap  
(μF)  
0.010  
0.0±±  
0.033  
0.047  
0.068  
0.10  
0.±±  
0.33  
0.47  
0.68  
1.0  
1.5  
±.±  
3.3  
Consult factory for  
additional requirements  
PHYSICAL DIMENSIONS AND PAD LAYOUT  
W
= X7R  
= X5R  
= X7S  
P
E
T
D
BW  
A
B
C
BL  
L
PAD LAYOUT  
DIMENSIONS  
PHYSICAL CHIP DIMENSIONS millimeters (inches)  
SIZE  
0306  
W
L
BW  
0.±5 ± 0.10  
BL  
0.±0 ± 0.10  
P
SIZE  
0306  
A
0.38  
B
0.89  
C
1.±7  
D
0.±0  
E
0.40  
1.60 ± 0.±0  
0.8± ± 0.10  
0.40 ± 0.05  
(0.015 ± 0.00±)  
(0.063 ± 0.008) (0.03± ± 0.006 (0.010 ± 0.004) (0.008± 0.004)  
±.03 ± 0.±0 1.±7 ± 0.±0 0.30 ± 0.10 0.±5 ± 0.15  
(0.080 ± 0.008) (0.050 ± 0.008) (0.01± ± 0.004) (0.010± 0.006)  
3.±0 ± 0.±0 1.60 ± 0.±0 0.50 ± 0.10 0.±5 ± 0.15  
(0.015) (0.035) (0.050) (0.008) (0.015)  
0.64 1.±7 1.91 0.±8 0.50  
(0.0±5) (0.050) (0.075) (0.011) (0.0±0)  
0.89 1.65 ±.54 0.45 0.80  
(0.035) (0.065) (0.010) (0.018) (0.031)  
0.50 ± 0.05  
(0.0±0 ± 0.00±)  
0508  
0612  
0508  
0612  
0.80 ± 0.10  
(0.1±6 ± 0.008) (0.063 ± 0.008) (0.0±0 ± 0.004) (0.010 ± 0.006) (0.031 ± 0.004)  
REV 01  
79  

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